Memory Sub system Validation Lead's responsibility includes all aspects of pre and post silicon validation from planning, execution and debug. Develop and execute test plans for HBM Functional and Electrical Validation (PVT Shmoo Characterization). The sought after candidate possess extensive knowledge of high bandwidth memory subsystem, including SoC memory architecture,

Extraordinary leadership skills and ability to inspire team members with an innate ability to see the bigger picture. Excellent debugging skills. Proven ability to drive resolution of critical problems, while under pressure. Ability to understand complex technical discussions, extract action plans, and to succinctly summarize complex details for executive reporting Abilit

Implement good DevOps practices and maintain tools and infrastructure that enable our teams to deliver high quality software reliably and efficiently. Collaborate with infrastructure architects and be responsible for the defining designing delivering of the technical architectures, patterns, technical quality, risks, fitness for purpose and operability of technical archit

Drive domain validation and automation infrastructure teams to set the content vision and lead the direction to gather requirements and investigate current content frameworks and consolidate frameworks as required. On Station Configuration requirements to come up with basic configurations that are easily shareable with multiple domains and IP areas Work with domain valida

Driving technical innovation to improve AMD's capabilities a cross validation, including tool and script development, technical and procedural methodology enhancement, and various internal and cross functional technical initiatives Manage a high performance team of debug engineers that work directly on customer/partner systems as well as internal reference platforms Arbit

Design of complex building blocks of a PLL including architecture development and transistor level circuit design Run pre tapeout verification flows to confirm design meets performance, power, reliability and timing requirements. Work closely with mask design engineers to deliver the physical design as well as define production/bench level test plans with post silicon cha

Work as part of AMD's GPU Architecture and Performance Team to develop future AMD products. Run simulation models for new products and analyze results to characterize both the product and workloads. Keep abreast of new workloads, particularly for AI models'. Collaborate closely with hardware architects, system engineers and business teams in evaluating and understanding p

Provide successful Cache Architecture development and execution using RTL Design, Verilog HDL, and scripting. Collaborate with Cache and CPU Architects to design, document, and execute optimized high performance Cache and Routing Fabric designs. Collaborate with Physical Design to develop RTL that is optimized for physical construction and timing closure. Collaborate with

Campus Recruiting Strategy Develop and implement an effective campus recruiting strategy, aligned with AMD's hiring needs and business goals Identify target universities and colleges for talent acquisition efforts Build and maintain a strong employer brand on campus Recruiting Management Manage full cycle recruiting efforts for interns and intern conversions for specific

Support data center marketing leads on programs; partner with COEs (Centers of Excellence) and stakeholders to carry out projects. Develop and maintain detailed comprehensive program plans, including creating a unified calendar, timelines, deliverables, milestones, resource allocation, and drive a feedback loop to improve future programs. Lead end to end and day to day ma

Implement and optimize GPU kernels using cutting edge compiler technology Conduct benchmarking on prevalent AI model workloads, including tasks in vision, speech recognition, language processing and generative models Collaborate with AMD's architecture specialists to enhance future products Stay abreast of software and hardware trends and innovations, particularly in algo

Work on architecture, feasibility, design, and system integration of high performance LDO designs for AMD products Work with the rest of the LDO and other AMD design teams to maintain this roadmap and implement in AMD products Provide mentorship as a technical leader for designers in the LDO design team Align and contribute to AMD methodologies, and the wider analog desig

Lead and prioritize triage and debug of complex system level issues, encompassing silicon to software, hardware, and firmware. Collaborate with designers, architects, and cross functional teams for effective issue resolution. Influence the roadmap for debug capabilities to shorten time to resolution for complex, at scale issues. Develop and implement tracker frameworks wi

Ownership of platform planning within the Server Business Unit. Build tight working relationships with customers and partners to best define products based on their evolving needs. Collaborating with engineering, business development and sales teams to synthesize market requirements into winning products for Cloud & Enterprise segments. Developing product specifications a

Provide senior thought leadership and significant technical contributions in design, implementation, and support of AMD's global network infrastructure. Bring passion, enthusiasm and dedication for a metrics driven approach towards Network uptime, resiliency, performance, low latency, and end user satisfaction. Provide in depth technical expertise to identify and evaluate